The present invention relates to the field of semiconductor device fabrication, and to the formation within such devices of silicon microstructures through the use of chemical vapor deposition, dopant implantation, feature patterning and etching, and other fabrication techniques. Furthermore, polysilicon is a material widely used in microelectronic devices, and the present invention relates to certain fabrication methods and device structures that may require the use of polysilicon. More particularly, in certain memory devices, polysilicon may be employed for floating gates of transistors used to form a storage array. In memory device applications of this type, the transistor floating gates are used to store and retain a plurality of electrical charges in accordance with the data being written. Subsequent read operations may then be performed on a device to retrieve stored data when it is needed.
In the manufacture of semiconductor devices, the structure of silicon may take different forms with respect to its crystalline properties. For example, in the form of ingots for the production of wafers, the preferred silicon structure is primarily monocrystalline, because this structure has the fewest number of crystal lattice faults, and this is desirable for the fabrication of semiconductor devices. On the other hand, silicon may also be fabricated in the form of polycrystalline or amorphous silicon, with crystalline lattices that include large numbers of grains with varying orientations and sizes. Moreover, the temperature, pressure, presence or absence of dopants, and other factors controlled in the fabrication of silicon can be used to determine the crystalline and other properties of the resulting silicon structures.
Multi-layer assemblies including polysilicon may be used in the fabrication of semiconductor devices. Certain types of multi-layer assemblies may be formed by the vapor deposition of one or more layers, which may then be further processed by patterning and etching techniques, to produce various device structures. When polysilicon transistor floating gate structures are manufactured in this manner, it is desirable that they have certain electrical and physical properties, in order to promote their ability to store and retain electrical charges.
Furthermore, unwanted loss by leakage of the charge stored on a transistor's floating gate may lead to the loss of stored data, and therefore is an undesirable event. Accordingly, it is advantageous to minimize the floating-gate leakage currents of a storage transistor, and thereby to increase its long-term ability to store data. Thus, the observed problem of the degradation of data retention can be attributed in part to the loss of gate charge by leakage.
One possible mechanism of charge loss from the floating-gate may involve charge leakage across the tunnel dielectric, from the floating gate to the channel or substrate. Thus, one factor that could contribute to the occurrence of the floating-gate stored charge loss by leakage would be the strength of the electric field across the tunnel dielectric. Moreover, in order to improve the data retention of a floating gate transistor, there exists a need for methods and structures that may help reduce the electric fields caused by a stored charge.